- PRODUCT OVERVIEW
The HiFive1 dev board has also been upgraded. Powered by the FE310-G002, the new HiFive1 Rev B has wireless connectivity through an onboard Wi-Fi/Bluetooth module. The USB debugger has been upgraded to Segger J-Link, with support for drag & drop code download. In favor of driving GPIO directly from the FE310, the HiFive1 Rev B supports 3.3 V I/O only.
Get a single HiFive1 Rev B dev kit, featuring the FE310-G002, SiFive's second generation open source RISC-V 32-bit SoC.
With this second-generation version, the FE310 chip now has a built-in hardware I²C peripheral and an extra UART (two total), which opens the door to connecting to all sorts of third-party sensors, actuators, and other devices. In addition, the USB debug interface has been upgraded to Segger J-Link.
Low-power Sleep Mode
The FE310-G002 has an Always-On (AON) power domain powered from 3.3 V. Controlled by AON, the CPU core power rail (1.8 V) can be turned off in sleep mode and will be turned on upon detecting a wake event.
The HiFive1 Rev B board has both Wi-Fi and Bluetooth capabilities, thanks to a single-core ESP32 co-processor that serves as a wireless modem for the FE310-G002 processor.